Applications involving voluminous data but needing low-latency computation and
local feedback require that the computing be performed as close to the data
source as possible --- often at the interface to the physical world.
Communication constraints and the need for privacy-preserving approaches also
dictate the need for computing at the edge. Given the growth in such application
scenarios and the recent advances in algorithms and techniques, machine learning
and inference at the edge are unfolding and growing at a rapid pace. In support
of these applications, a wide range of hardware (CPUs, GPUs, ASICs) is venturing
farther away from the center, closer to the physical world. The resulting diversity
in edge-computing hardware in terms of capabilities, architectures, and programming
models poses several new challenges.
At the edge, several applications often need to be scheduled concurrently or
serially. Some applications may need to be run continuously, a few in
anticipation of certain events, whereas others may need to be run when
particular events occur, causing a need to unload other applications and
dedicate resources to them. Situations may also warrant running applications in
sandboxes for privacy, security, and resource allocation reasons. A future with
heterogeneous edge hardware and multiple applications sharing the hardware and
energy resources is imminent.
Deploying and managing applications at the edge remotely, and building in
multienancy to support applications with various resource constraints and
runtime requirements, present a challenge that requires cooperation and
coordination between the various components of the software stack. Mechanisms
need to be devised that communicate both data and control with the applications
in order to fine-tune their behavior and change the operational parameters.
Coupling these edge applications with centrally located HPC resources and their
applications, realizing the computing continuum, also opens up many research
areas.
As we push more toward edge-enabled networks of devices, we inherit a setting
where resources are deployed away from the safety of secure indoor spaces, often
in the midst of a bustling urban canyon, and exposed to physical and
cybersecurity threats. Deployed and interconnected predominantly over public
networks, these systems have to be designed with cybersecurity as a first-class
design citizen, rather than introduced as an afterthought.
The goal of this workshop is to gather the community working in three broad
areas:
- processing — artificial intelligence, computer vision, machine learning;
- management — parallel and distributed programming models for resource-constrained
and domain-specific hardware, containers, remote resource
management, runtime-system design, and cybersecurity; and
- hardware — systems and devices conducive to use in resource-constrained (energy,
space, etc.)
applications.
The workshop will provide a critically needed opportunity
to discuss the current trends and issues, to share visions, and to present
solutions.
Topics
For this workshop we welcome original work covering different aspects of:
- Edge Inference
- Hardware for Edge-computing and Machine Learning
- Energy Efficient Processors for Training and Inference
- Computer Vision at the Edge
- Cyber Security for Edge Computing
- Software and Hardware Multitenancy at the Edge
- Machine Learning Hardware
- On device machine learning algorithms
- Real-time computer vision and speech processing
- Learning-enabled IoT applications
- Distributed inferencing and learning
- 5G for Science and Edge Computing
- Programming Models for Edge Computing
- Coupling HPC to Edge Applications
- Communication and Control Strategies for Deploying and Managing Applications at the Edge
Paper Submission, Paper Style, and Proceedings
All papers must be original and not simultaneously submitted to another journal or conference.
The papers submitted to the workshop will be peer reviewed by a minimum of 3 reviewers.
The following paper categories are welcome:
- Full Papers: Research papers should describe original work and be 8 or 10 pages in
length.
- Short Papers: Short research papers, 4 pages in length, should contain enough
information for the program committee to understand the scope of the project and evaluate
the novelty of the problem or approach.
- Late Breaking Results and Concept Papers: Short papers, 2-3 pages. The authors
have the option of having the selected papers published or accepted as non-archival
submissions. The non-archival submissions do not preclude future publication.
Previously published work may be submitted under certain circumstances. These
papers will be presented as 8-10 min lightning-talks. Please indicate in the
end of the paper under what track the submission is intended.
- Emerging Platforms and Practitioner Reports: Short reports, 3-6 pages in length,
describing novel hardware and Software platforms, including initial proof-of-concept design
and implementation are welcome. Reports may also focus on a particular aspect of technology
usage in practice, or describe broad project experiences. They may describe a particular
design idea, or experience with a particular piece of technology.
Templates for MS Word and LaTeX provided by IEEE eXpress Conference Publishing are available for
download.
See the latest versions here.
Here is a link to the EasyChair CFP. Upload
your submission to
EasyChair submission server in
PDF format. Accepted
manuscripts will be included in the IPDPS workshop proceedings.
Important Dates
-
February 14th, 2020: February 29th AOE, 2020: Submission deadline.
- March 11th, 2020: Notification of acceptance.
- March 15th, 2020: Camera ready papers due.
- May 22nd, 2020: Workshop!!!
Program Committee
- Chris Adeniyi-Jones, ARM Research, USA
- Anish Arora, The Ohio State University, USA
- Cristiana Bentes, Universidade do Estado do Rio de Janeiro (UERJ), Brazil
- Sergio Armando Gutiérrez Betancur, Universidad de Medellín, Colombia
- Prasanna Balaprakash, Argonne National Laboratory, USA
- Marco Brocanelli, Wayne State University, USA
- Lucy Cherkasova, ARM Research, USA
- Charlie Catlett, Argonne National Laboratory, USA
- Ren Cooper, Lawrence Berkeley National Laboratory, USA
- Nicolas Erdody, Open Parallel, New Zealand
- Felipe M. G. França, Universidade Federal do Rio de Janeiro (UFRJ), Brazil
- Nicola Ferrier, University of Chicago, USA
- Dennis Gannon, Indiana University Bloomington, USA
- Eric Van Hensbergen, ARM Research, USA
- Sandip Kundu, University of Massachusetts Amherst, USA
- Priscila Machado Vieira Lima, Universidade Federal do Rio de Janeiro, Brazil
- Leandro Marzulo, Google LLC, USA
- Alan Mainwaring, Intel Corporation, USA
- Eric Matson, Purdue University, USA
- Michael Papka, Northern Illinois University, USA
- Dhrubojyoti Roy, The Ohio State University, USA
- Mina Sartipi, University of Tennessee at Chattanooga, USA
- Koichi Shinoda, Tokyo Institute of Technology, Japan
- German Sánchez Torres, Universidad del Magdalena, Colombia
- Jerry Trahan, Louisiana State University, USA
- Sean Shahkarami, University of Chicago, USA
- Weisong Shi, Wayne State University, USA
- Ramachandran Vaidyanathan, Louisiana State University, USA
- Kazutomo Yoshii, Argonne National Laboratory, USA
Workshop Organizers